1. Field of the Invention
The present invention relates to the field of power sequencing and more specifically to power sequencing for independent logic circuits.
2. Description of the Related Art
Individual computers, such as PCs and workstations, and server systems are often fitted with a variety of independent logic circuits after setup. Independent logic circuits include Ethernet adapters, video cards, sound cards, Bluetooth adapters or any independent application specific integrated circuit that can be connected to the communications bus of a master computer system via a common interface connection standard, such as Small Computer System Interface (SCSI), Peripheral Component Interconnect (PCI) or Personal Computer Memory Card International Association (PCMCIA). One method of connecting an independent logic circuit to a master computer system is by hot-plugging, which refers to the ability to add and remove devices to a computer while the computer is running and have the operating system automatically recognize the change. Several external bus standards, such as Universal Serial Bus (USB) and IEEE 1394, support hot-plugging.
A common problem with the coupling of independent logic circuits to a master computer system arises when the master computer system is on standby or asleep. In this situation, standby or auxiliary power is often still present in the machine such that certain components, such as an Ethernet adapter card, can continue to perform certain necessary functions, such as detecting the reception of a Wake-on-LAN signal, thereby spawning a complete wake-up of the system. If an independent logic circuit is plugged into the master computer system or otherwise connected to the master computer system while standby power is still present, the logic module could behave improperly and emit an unexpected signal, such as a spurious Wake-on-LAN power management event (PME) signal, over an interrupt line and lead to an unforeseen occurrence, such as a full system wake-up. This situation also occurs when a standard that supports hot-plugging, such as PCI, sees the insertion of a PCI module while standby power is present. The negative effects of such an occurrence include the unintended wake-up of the master computer system, the reception of incorrect or false PME events and/or the presence of system error messages.
The problem described above arises from the powering of the I/O driver of the independent logic circuit before the core logic of the circuit. Typically, independent logic circuits expect a power-up process wherein the core logic of the circuit is powered up before the I/O driver of the circuit. When this process is interrupted or executed out of sequence, unexpected signals can be emitted from the interrupts of the circuit. Conventionally, this problem was avoided by instructing administrators not to plug independent logic circuits into a master computer system while on standby power. They were instructed to completely power off (including standby power) the master computer system before adding the independent logic circuit. The drawback to this approach is that users who purchase a hot-plug-capable independent logic circuit expect to be able to hot-plug the circuit into an independent logic circuit into a master computer system while it is powered on, powered off, on standby or asleep.
Another approach to the problem described above includes power sequencing of various voltage rails to the logic of the independent logic circuit. The draw back to this approach is that every voltage rail attached to an independent logic circuit requires power switches and associated control lines. In fact, some independent logic circuits can use three to four voltage rails. This can be costly to manufacture and increases the complexity of the system. Yet another approach to this problem is a power design that allows for a seamless transition between full voltage when a computer system is completely powered on and standby voltage when a computer system is asleep or on standby. This approach, however, is not applicable to certain independent logic circuits that support hot-plugging, such as hot-pluggable PCI adapters, since the PCI standard only allows for standby power at the PCI slot.
Yet another approach to this problem includes the regulation of error or interrupt signals from the independent logic circuit during warm-up or start-up of the independent logic circuit when inserted during standby. The drawback to this approach is that it is not universally applicable to all independent logic circuits and is applied only after improper behavior of the logic circuit is observed when plugging during standby. Independent logic circuits of different types behave differently when plugged during standby. Thus, the need arises to solve the problems with the prior art above and specifically for a more efficient way to couple independent logic circuits with a master computer system during standby.